b2cf9b4710
+ lapic: Start implementation + ioapic: Start implementation + apic: Now properly working + madt: Start implementation + pit: Start implementation + smp: Start implementation (only grabs the bootstrap processor's LAPIC ID)
116 lines
No EOL
1.6 KiB
NASM
116 lines
No EOL
1.6 KiB
NASM
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%macro pushall 0
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push rax
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push rcx
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push rdx
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push rbx
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push rbp
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push rsi
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push rdi
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push r8
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push r9
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push r10
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push r11
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push r12
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push r13
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push r14
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push r15
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%endmacro
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%macro popall 0
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pop r15
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pop r14
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pop r13
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pop r12
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pop r11
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pop r10
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pop r9
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pop r8
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pop rdi
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pop rsi
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pop rbp
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pop rbx
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pop rdx
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pop rcx
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pop rax
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%endmacro
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%macro isr_err_stub 1
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isr_stub_%+%1:
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push %1
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pushall
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mov rdi, rsp
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call idt_interrupt_handler
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popall
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add rsp, 16
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iretq
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%endmacro
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%macro isr_no_err_stub 1
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isr_stub_%+%1:
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push 0 ; push the error code (0) into the stack
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push %1 ; push intno into the stack
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pushall
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mov rdi, rsp ; put the stack as the first arg.
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call idt_interrupt_handler
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popall
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add rsp, 16
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iretq
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%endmacro
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extern idt_interrupt_handler
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isr_no_err_stub 0
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isr_no_err_stub 1
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isr_no_err_stub 2
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isr_no_err_stub 3
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isr_no_err_stub 4
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isr_no_err_stub 5
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isr_no_err_stub 6
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isr_no_err_stub 7
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isr_err_stub 8
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isr_no_err_stub 9
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isr_err_stub 10
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isr_err_stub 11
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isr_err_stub 12
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isr_err_stub 13
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isr_err_stub 14
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isr_no_err_stub 15
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isr_no_err_stub 16
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isr_err_stub 17
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isr_no_err_stub 18
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isr_no_err_stub 19
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isr_no_err_stub 20
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isr_no_err_stub 21
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isr_no_err_stub 22
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isr_no_err_stub 23
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isr_no_err_stub 24
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isr_no_err_stub 25
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isr_no_err_stub 26
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isr_no_err_stub 27
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isr_no_err_stub 28
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isr_no_err_stub 29
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isr_err_stub 30
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isr_no_err_stub 31
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%assign i 32
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%rep 224
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isr_no_err_stub i
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%assign i i+1
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%endrep
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global isr_stub_table
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isr_stub_table:
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%assign i 0
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%rep 256
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dq isr_stub_%+i
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%assign i i+1
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%endrep |