59 lines
No EOL
1.4 KiB
C
59 lines
No EOL
1.4 KiB
C
#include <sys/arch/x86_64/sse.h>
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#include <sys/log.h>
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#include <sys/printf.h>
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int cpuid_check_bit(int reg, int bit) {
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int eax, ebx, ecx, edx;
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// Minimal inline assembly to execute CPUID
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__asm__ volatile("cpuid" // Execute CPUID instruction
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: "=a"(eax), "=b"(ebx), "=c"(ecx),
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"=d"(edx) // Output registers
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: "a"(0x1) // Input: EAX = 0x1 (query feature flags)
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: // No clobbered registers
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);
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// Check bit 25 of EDX (SSE support) in plain C
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if (reg == 0) {
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if (edx & (1 << bit)) {
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return 1; // SSE is supported
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} else {
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return 0; // SSE is not supported
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}
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} else if (reg == 1) {
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if (ecx & (1 << bit)) {
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return 1; // SSE is supported
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} else {
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return 0; // SSE is not supported
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}
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}
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return 0;
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}
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void sse_init() {
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int sse = cpuid_check_bit(0, 25);
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int sse2 = cpuid_check_bit(0, 26);
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int sse3 = cpuid_check_bit(1, 0);
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int ssse3 = cpuid_check_bit(1, 9);
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if (sse)
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log("sse - sse is supported!\n");
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else
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log("sse - sse isn't supported!\n");
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if (sse2)
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log("sse - sse2 is supported!\n");
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else
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log("sse - sse2 isn't supported!\n");
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if (sse3)
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log("sse - sse3 is supported!\n");
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else
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log("sse - sse3 isn't supported!\n");
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if (ssse3)
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log("sse - ssse3 is supported!\n");
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else
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log("sse - ssse3 isn't supported!\n");
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} |