kernel - various changes

+ vmm: higher half should not be identify-mapped
+ panic: now displays current process
+ kernel: fix physical addresses (ḑ̷̩̜̦̥̰͔̻͔̖͎̳̗̫̓̓͊́̒͜ơ̸͙͎̠͎̩̤̭̬̙͚̬̣͇̤̼̑̐̿̿͆͠͝ ̷̗̟̘͎̥̤̭̂͛͆́͂͝͠ͅN̴̨̛̥̩̺͚̺̠͙̼̙̯̱͚̫̊̐̅̀̌̏͆̋̕͜͝͠ͅö̵̪͚̞̞̜͎͉̦́́̍̀̃̋̇̄̓͊̎͝t̶̡͍̩̤̹̤̂̑̓͌͂̾̑̈́͒̾̾́͐͆͊͂ ̴̨̫̺̦̊̍̒͛͌̌͂͘̚̚͘͘͝I̶̥͚̯̖̙̩͂́͜d̸̢̡̗͉̠̹̒͠e̸̡̪̺͎͖͚̗̟̟̥͍͑̈̋̉̋̓̐̊̚͘͜n̸̡̍͐͗̈͌̀̓̃́́͠t̶̢͈͈̦̻̰͎̪̰̒̄͒̃̐͜ĩ̴͕̼̻͓͚͕̲̬̤͈̜̣̐̍́̾̀̏̏̑͒̚ͅf̷̡̨̼̻̠̠͔̪͍͛y̴͉͓̓͒̆̎̚ ̶̟͙͖̙̟͍̟͕̞̥̹͇̌̉́̑͗͋̀̕ͅͅM̷͙̬̲̓a̶̫̰̞̺̖̍̀p̶̡̨̡̗̖̹̩̫̯̞̬͋͂̏̍̾̽͜ͅ ̶̧̨̧̫͉̝̮̳͎͍̱̟̪̝̀̽͑̂̿̄̈̇̓͘Ḫ̶̨̨̗̣̪͓̺͙͈͙̀ḭ̶̧̡͇̹͙̩͍͎̮̤̦̜̻͎̞̔̐̇̉̓͒͛̅̿͊̍͆͘̕g̷͖͙͍͓̯̪̩̑̑͋̈́͌͐̊̀͝͠͝ĥ̴̢̡̫̪̟̞̭̟͕̖͎͊͑͛̆͝e̴̡̨̗̱̱͙͔̻̤͎͆̒̾̾̓̈͊̓ͅr̵̛͈̩͍̔̌̃̇͊̽̀̉̽̊͌̿́ ̷̨̡̛̩̹̹̇̇̈́̑̍̊͒̄́͛H̷̨̪̜̤͍̻͎̲̜͋́̆͋̂̚͘͘͜͠ą̷̠͓̫̲́́̽̉̒͌́̓ͅl̴̢̛͈̤̺̱̙̬̆̎̄̊̈́̐̾̏̿̕f̸̢̰͓̦̺̰̯͚̣̙͔̺̂͜͜)
This commit is contained in:
RaphProductions 2025-05-16 08:01:37 +02:00
parent a8e919b033
commit b2ec036055
32 changed files with 265 additions and 265 deletions

View file

@ -1,11 +1,11 @@
// #include "sys/log.h"
#include "arch/x86_64/smp.h"
#include "dev/ioapic.h"
#include "dev/lapic.h"
#include "mm/vmm.h"
#include "arch/x86_64/smp.h"
#include "sys/errhnd/panic.h"
#include <arch/x86_64/idt.h>
#include <stdbool.h>
#include <arch//x86_64/idt.h>
#include <sys/log.h>
__attribute__((aligned(0x10))) static idt_entry_t idt[256];
@ -50,9 +50,9 @@ void idt_init() {
}
// Do not use the legacy PIC.
//pic_init();
//pic_unmask_irq(1);
//pic_unmask_irq(8);
// pic_init();
// pic_unmask_irq(1);
// pic_unmask_irq(8);
__asm__ volatile("lidt %0" : : "m"(idtr)); // load the new IDT
__asm__ volatile("sti"); // set the interrupt flag
@ -60,11 +60,10 @@ void idt_init() {
log("idt - initialized\n");
}
void idt_int_handler(registers_t *regs) {
vmm_load_pagemap(vmm_kernel_pm);
//log("kernel - Interrupt %d\n", regs->int_no);
// log("kernel - Interrupt %d\n", regs->int_no);
if (regs->int_no < 32) {
panic_ctx("A CPU exception occured.", regs);
}
@ -79,5 +78,5 @@ void idt_int_handler(registers_t *regs) {
}
lapic_eoi();
//pic_ack(regs->int_no - 32);
// pic_ack(regs->int_no - 32);
}

View file

@ -5,7 +5,7 @@
// VT = Vector type
#define IDT_VT_UNDEFINED 0
#define IDT_VT_EXCEPTION 1
#define IDT_VT_IRQ 2
#define IDT_VT_IRQ 2
typedef struct {
uint64_t r15;
@ -55,7 +55,7 @@ typedef struct {
uint64_t base;
} __attribute__((packed)) idtr_t;
typedef void(*idt_irq_handler_t)(registers_t *regs);
typedef void (*idt_irq_handler_t)(registers_t *regs);
void idt_register_irq(uint8_t vector, void *isr);
void idt_set_descriptor(uint8_t vector, void *isr, uint8_t flags);

View file

@ -5,24 +5,14 @@
#define IA32_GS_MSR 0xC0000101
#define IA32_GS_KERNEL_MSR 0xC0000102
static inline void wrmsr(uint64_t msr, uint64_t value)
{
uint32_t low = value & 0xFFFFFFFF;
uint32_t high = value >> 32;
asm volatile (
"wrmsr"
:
: "c"(msr), "a"(low), "d"(high)
);
static inline void wrmsr(uint64_t msr, uint64_t value) {
uint32_t low = value & 0xFFFFFFFF;
uint32_t high = value >> 32;
asm volatile("wrmsr" : : "c"(msr), "a"(low), "d"(high));
}
static inline uint64_t rdmsr(uint64_t msr)
{
uint32_t low, high;
asm volatile (
"rdmsr"
: "=a"(low), "=d"(high)
: "c"(msr)
);
return ((uint64_t)high << 32) | low;
static inline uint64_t rdmsr(uint64_t msr) {
uint32_t low, high;
asm volatile("rdmsr" : "=a"(low), "=d"(high) : "c"(msr));
return ((uint64_t)high << 32) | low;
}

View file

@ -1,14 +1,14 @@
#include "arch//x86_64/idt.h"
#include "arch/x86_64/idt.h"
#include "sched/sched.h"
#include <arch/x86_64/idt.h>
#include <arch/x86_64/pit.h>
#include <stdint.h>
#include <sys/log.h>
#include <arch//x86_64/idt.h>
#include <arch//x86_64/pit.h>
uint32_t tick = 0;
void pit_handler(registers_t *regs) {
//log("PIT");
// log("PIT");
tick++;
schedule(regs);
}
@ -18,12 +18,13 @@ void pit_init() {
uint16_t div = (uint16_t)(1193180 / 1000);
outb(0x40, (uint8_t)div);
outb(0x40, (uint8_t)(div >> 8));
idt_register_irq(0, pit_handler);
}
void pit_enable() { idt_register_irq(0, pit_handler); }
void pit_sleep(uint32_t ms) {
uint64_t start = tick;
while (tick - start < ms) {
__asm__ volatile ("nop");
__asm__ volatile("nop");
}
}

3
kernel/src/arch/x86_64/pit.h Executable file → Normal file
View file

@ -1,12 +1,13 @@
#ifndef PIT_H
#define PIT_H
#include <arch/x86_64/io.h>
#include <stdint.h>
#include <arch//x86_64/io.h>
extern uint32_t tick;
void pit_init();
void pit_sleep(uint32_t ms);
void pit_enable();
#endif

View file

@ -1,49 +1,52 @@
#include "arch//x86_64/smp.h"
#include "arch/x86_64/smp.h"
#include "lib/spinlock.h"
#include "sys/log.h"
#include "limine.h"
#include "sys/log.h"
#include <stdint.h>
__attribute__((
used,
section(".limine_requests"))) static volatile struct limine_mp_request
used, section(".limine_requests"))) static volatile struct limine_mp_request
smp_request = {.id = LIMINE_MP_REQUEST, .revision = 0};
uint32_t bootstrap_lapic_id = 0;
uint32_t smp_cpu_count = 0; // Number of processors
spinlock_t smp_lock = { 0 };
spinlock_t smp_lock = {0};
uint32_t ctr = 0;
void smp_entry(struct limine_mp_info* smp_info) {
//spinlock_acquire(&smp_lock);
void smp_entry(struct limine_mp_info *smp_info) {
// spinlock_acquire(&smp_lock);
log("smp - CPU %d started (LAPIC ID: %d)\n", smp_info->processor_id, smp_info->lapic_id);
__atomic_fetch_add(&ctr, 1, __ATOMIC_SEQ_CST);
log("smp - CPU %d started (LAPIC ID: %d)\n", smp_info->processor_id,
smp_info->lapic_id);
__atomic_fetch_add(&ctr, 1, __ATOMIC_SEQ_CST);
while (1)
;;
//spinlock_release(&smp_lock);
while (1)
;
;
// spinlock_release(&smp_lock);
}
void smp_init() {
bootstrap_lapic_id = smp_request.response->bsp_lapic_id;
smp_cpu_count = smp_request.response->cpu_count;
bootstrap_lapic_id = smp_request.response->bsp_lapic_id;
smp_cpu_count = smp_request.response->cpu_count;
log("smp - detected %d CPUs\n", smp_cpu_count);
log("smp - detected %d CPUs\n", smp_cpu_count);
for (uint64_t i = 0; i < smp_cpu_count; i++) {
if (smp_request.response->cpus[i]->lapic_id != bootstrap_lapic_id) {
uint32_t old_ctr = __atomic_load_n(&ctr, __ATOMIC_SEQ_CST);
for (uint64_t i = 0; i < smp_cpu_count; i++) {
if (smp_request.response->cpus[i]->lapic_id != bootstrap_lapic_id) {
uint32_t old_ctr = __atomic_load_n(&ctr, __ATOMIC_SEQ_CST);
__atomic_store_n(&smp_request.response->cpus[i]->goto_address, smp_entry, __ATOMIC_SEQ_CST);
__atomic_store_n(&smp_request.response->cpus[i]->goto_address, smp_entry,
__ATOMIC_SEQ_CST);
while (__atomic_load_n(&ctr, __ATOMIC_SEQ_CST) == old_ctr)
;
} else {
log("smp - CPU %d is the bootstrap processor (LAPIC ID: %d)\n", i, smp_request.response->cpus[i]->lapic_id);
}
while (__atomic_load_n(&ctr, __ATOMIC_SEQ_CST) == old_ctr)
;
} else {
log("smp - CPU %d is the bootstrap processor (LAPIC ID: %d)\n", i,
smp_request.response->cpus[i]->lapic_id);
}
}
log("smp - initialized\n");
log("smp - initialized\n");
}

View file

@ -1,4 +1,4 @@
#include <arch//x86_64/sse.h>
#include <arch/x86_64/sse.h>
#include <sys/log.h>
#include <sys/printf.h>

View file

@ -10,7 +10,8 @@ void __x86_64_syscall_init() {
wrmsr(IA32_EFER, efer);
uint64_t star = 0;
star |= ((uint64_t)0x28 << 32); // kernel cs
star |= ((uint64_t)0x30 << 48); // user cs base (SYSCALL adds 16 for CS=0x38, 24 for SS=0x40)
star |= ((uint64_t)0x30
<< 48); // user cs base (SYSCALL adds 16 for CS=0x38, 24 for SS=0x40)
wrmsr(IA32_STAR, star);
wrmsr(IA32_LSTAR, (uint64_t)syscall_entry);
wrmsr(IA32_CSTAR, 0x0);

View file

@ -1,6 +1,6 @@
#pragma once
#define IA32_EFER 0xC0000080
#define IA32_EFER 0xC0000080
#define IA32_STAR 0xC0000081
#define IA32_LSTAR 0xC0000082
#define IA32_CSTAR 0xC0000083

View file

@ -1,11 +1,11 @@
#include "sys/acpi/madt.h"
#include <dev/ioapic.h>
#include <sys/log.h>
#include <mm/pmm.h>
#include <sys/log.h>
void ioapic_init() {
madt_ioapic* ioapic = acpi_madt_ioapic_list[0];
madt_ioapic *ioapic = acpi_madt_ioapic_list[0];
uint32_t val = ioapic_read(ioapic, IOAPIC_VER);
uint32_t count = ((val >> 16) & 0xFF);
@ -14,44 +14,49 @@ void ioapic_init() {
}
for (uint8_t i = 0; i <= count; ++i) {
ioapic_write(ioapic, IOAPIC_REDTBL+2*i, 0x00010000 | (32 + i));
ioapic_write(ioapic, IOAPIC_REDTBL+2*i+1, 0);
ioapic_write(ioapic, IOAPIC_REDTBL + 2 * i, 0x00010000 | (32 + i));
ioapic_write(ioapic, IOAPIC_REDTBL + 2 * i + 1, 0);
}
log("ioapic - initialized\n");
}
void ioapic_write(madt_ioapic* ioapic, uint8_t reg, uint32_t val) {
*((volatile uint32_t*)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_REGSEL)) = reg;
*((volatile uint32_t*)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_IOWIN)) = val;
void ioapic_write(madt_ioapic *ioapic, uint8_t reg, uint32_t val) {
*((volatile uint32_t *)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_REGSEL)) =
reg;
*((volatile uint32_t *)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_IOWIN)) = val;
}
uint32_t ioapic_read(madt_ioapic* ioapic, uint8_t reg) {
*((volatile uint32_t*)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_REGSEL)) = reg;
return *((volatile uint32_t*)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_IOWIN));
uint32_t ioapic_read(madt_ioapic *ioapic, uint8_t reg) {
*((volatile uint32_t *)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_REGSEL)) =
reg;
return *(
(volatile uint32_t *)(HIGHER_HALF(ioapic->apic_addr) + IOAPIC_IOWIN));
}
void ioapic_set_entry(madt_ioapic* ioapic, uint8_t idx, uint64_t data) {
void ioapic_set_entry(madt_ioapic *ioapic, uint8_t idx, uint64_t data) {
ioapic_write(ioapic, (uint8_t)(IOAPIC_REDTBL + idx * 2), (uint32_t)data);
ioapic_write(ioapic, (uint8_t)(IOAPIC_REDTBL + idx * 2 + 1), (uint32_t)(data >> 32));
ioapic_write(ioapic, (uint8_t)(IOAPIC_REDTBL + idx * 2 + 1),
(uint32_t)(data >> 32));
}
uint64_t ioapic_gsi_count(madt_ioapic* ioapic) {
uint64_t ioapic_gsi_count(madt_ioapic *ioapic) {
return (ioapic_read(ioapic, 1) & 0xff0000) >> 16;
}
madt_ioapic* ioapic_get_gsi(uint32_t gsi) {
madt_ioapic *ioapic_get_gsi(uint32_t gsi) {
for (uint64_t i = 0; i < acpi_madt_ioapic_length; i++) {
madt_ioapic* ioapic = acpi_madt_ioapic_list[i];
if (ioapic->gsi_base <= gsi && ioapic->gsi_base + ioapic_gsi_count(ioapic) > gsi)
madt_ioapic *ioapic = acpi_madt_ioapic_list[i];
if (ioapic->gsi_base <= gsi &&
ioapic->gsi_base + ioapic_gsi_count(ioapic) > gsi)
return ioapic;
}
return (madt_ioapic*)0;
return (madt_ioapic *)0;
}
void ioapic_redirect_gsi(uint32_t lapic_id, uint8_t vec, uint32_t gsi, uint16_t flags, bool mask) {
madt_ioapic* ioapic = ioapic_get_gsi(gsi);
void ioapic_redirect_gsi(uint32_t lapic_id, uint8_t vec, uint32_t gsi,
uint16_t flags, bool mask) {
madt_ioapic *ioapic = ioapic_get_gsi(gsi);
uint64_t redirect = vec;
@ -63,8 +68,10 @@ void ioapic_redirect_gsi(uint32_t lapic_id, uint8_t vec, uint32_t gsi, uint16_t
redirect |= (1 << 15);
}
if (mask) redirect |= (1 << 16);
else redirect &= ~(1 << 16);
if (mask)
redirect |= (1 << 16);
else
redirect &= ~(1 << 16);
redirect |= (uint64_t)lapic_id << 56;
@ -73,9 +80,10 @@ void ioapic_redirect_gsi(uint32_t lapic_id, uint8_t vec, uint32_t gsi, uint16_t
ioapic_write(ioapic, redir_table + 1, (uint32_t)(redirect >> 32));
}
void ioapic_redirect_irq(uint32_t lapic_id, uint8_t vec, uint8_t irq, bool mask) {
void ioapic_redirect_irq(uint32_t lapic_id, uint8_t vec, uint8_t irq,
bool mask) {
uint8_t idx = 0;
madt_iso* iso = (madt_iso*)0;
madt_iso *iso = (madt_iso *)0;
while (idx < acpi_madt_iso_length) {
iso = acpi_madt_iso_list[idx];
@ -91,7 +99,7 @@ void ioapic_redirect_irq(uint32_t lapic_id, uint8_t vec, uint8_t irq, bool mask)
uint32_t ioapic_get_redirect_irq(uint8_t irq) {
uint8_t idx = 0;
madt_iso* iso;
madt_iso *iso;
while (idx < acpi_madt_iso_length) {
iso = acpi_madt_iso_list[idx];

View file

@ -5,20 +5,20 @@
#include <sys/acpi/madt.h>
#define IOAPIC_REGSEL 0x0
#define IOAPIC_IOWIN 0x10
#define IOAPIC_IOWIN 0x10
#define IOAPIC_ID 0x0
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_ID 0x0
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
void ioapic_write(madt_ioapic *ioapic, uint8_t reg, uint32_t val);
uint32_t ioapic_read(madt_ioapic *ioapic, uint8_t reg);
void ioapic_write(madt_ioapic* ioapic, uint8_t reg, uint32_t val);
uint32_t ioapic_read(madt_ioapic* ioapic, uint8_t reg);
void ioapic_redirect_irq(uint32_t lapic_id, uint8_t vec, uint8_t irq, bool mask);
void ioapic_redirect_irq(uint32_t lapic_id, uint8_t vec, uint8_t irq,
bool mask);
uint32_t ioapic_get_redirect_irq(uint8_t irq);
void ioapic_set_entry(madt_ioapic* ioapic, uint8_t idx, uint64_t data);
void ioapic_set_entry(madt_ioapic *ioapic, uint8_t idx, uint64_t data);
void ioapic_init();

View file

@ -27,7 +27,7 @@ void lapic_calibrate_timer() {
lapic_write(LAPIC_TIMER_DIV, 0);
lapic_write(LAPIC_TIMER_LVT, (1 << 16) | 0xff);
lapic_write(LAPIC_TIMER_INITCNT, 0xFFFFFFFF);
//pit_sleep(1); // 1 ms
// pit_sleep(1); // 1 ms
lapic_write(LAPIC_TIMER_LVT, LAPIC_TIMER_DISABLE);
uint32_t ticks = 0xFFFFFFFF - lapic_read(LAPIC_TIMER_CURCNT);
apic_ticks = ticks;
@ -35,16 +35,14 @@ void lapic_calibrate_timer() {
}
void lapic_write(uint32_t reg, uint32_t val) {
*((volatile uint32_t*)(HIGHER_HALF(0xfee00000) + reg)) = val;
*((volatile uint32_t *)(HIGHER_HALF(0xfee00000) + reg)) = val;
}
uint32_t lapic_read(uint32_t reg) {
return *((volatile uint32_t*)(HIGHER_HALF(0xfee00000) + reg));
return *((volatile uint32_t *)(HIGHER_HALF(0xfee00000) + reg));
}
void lapic_eoi() {
lapic_write((uint8_t)0xb0, 0x0);
}
void lapic_eoi() { lapic_write((uint8_t)0xb0, 0x0); }
void lapic_ipi(uint32_t id, uint8_t dat) {
lapic_write(LAPIC_ICRHI, id << LAPIC_ICDESTSHIFT);
@ -59,6 +57,4 @@ void lapic_send_others_int(uint32_t id, uint32_t vec) {
lapic_ipi(id, vec | LAPIC_ICRAES);
}
uint32_t lapic_get_id() {
return lapic_read(0x0020) >> LAPIC_ICDESTSHIFT;
}
uint32_t lapic_get_id() { return lapic_read(0x0020) >> LAPIC_ICDESTSHIFT; }

View file

@ -1,19 +1,19 @@
#include "fs/vfs.h"
#include "lib/string.h"
#include "mm/liballoc/liballoc.h"
#include "mm/memop.h"
#include "lib/string.h"
vnode_t *vfs_create_node(char *name, vnode_type_t type) {
vnode_t *node = (vnode_t *)malloc(sizeof(vnode_t));
if (!node) {
return NULL;
}
memset(node, 0, sizeof(vnode_t));
strncpy(node->name, name, sizeof(node->name) - 1);
node->type = type;
node->ops = NULL;
//node->parent = NULL;
//node->child = NULL;
//node->next = NULL;
return node;
vnode_t *node = (vnode_t *)malloc(sizeof(vnode_t));
if (!node) {
return NULL;
}
memset(node, 0, sizeof(vnode_t));
strncpy(node->name, name, sizeof(node->name) - 1);
node->type = type;
node->ops = NULL;
// node->parent = NULL;
// node->child = NULL;
// node->next = NULL;
return node;
}

View file

@ -6,41 +6,41 @@
struct vnode;
#define VN_FILE 1
#define VN_DIR 2
#define VN_DIR 2
typedef uint32_t vnode_type_t;
typedef struct vnode_ops {
int (*read)(struct vnode* vn, void* buf, size_t off, size_t size);
struct vnode* (*lookup)(struct vnode* vn, const char* name);
int (*read)(struct vnode *vn, void *buf, size_t off, size_t size);
struct vnode *(*lookup)(struct vnode *vn, const char *name);
} vnode_ops_t;
typedef struct vnode {
char name[256];
vnode_type_t type;
uint32_t refcount;
//struct vnode* parent;
//struct vnode* child;
//struct vnode* next;
char name[256];
vnode_type_t type;
uint32_t refcount;
// struct vnode* parent;
// struct vnode* child;
// struct vnode* next;
struct vnode_ops* ops;
void* internal;
struct vnode_ops *ops;
void *internal;
} vnode_t;
typedef struct mountpoint {
char name[32];
struct fs* fs;
vnode_t* mountpoint;
char name[32];
struct fs *fs;
vnode_t *mountpoint;
} mountpoint_t;
typedef struct fs {
char name[32];
struct vnode* root;
int (*mount)(struct vnode* mountpoint);
char name[32];
struct vnode *root;
int (*mount)(struct vnode *mountpoint);
} fs_t;
void vfs_init(void);
int vfs_mount(char *path, fs_t* fs);
int vfs_mount(char *path, fs_t *fs);
int vfs_unmount(char *path);
int vfs_open(const char* path, vnode_t** result);
int vfs_read(vnode_t* vn, void* buf, size_t off, size_t size);
int vfs_open(const char *path, vnode_t **result);
int vfs_read(vnode_t *vn, void *buf, size_t off, size_t size);

View file

@ -4,28 +4,28 @@
#include <stdint.h>
typedef struct spinlock {
volatile int locked;
volatile int locked;
} spinlock_t;
static inline void spinlock_acquire(spinlock_t *lock) {
//uint64_t timeout = 1000000; // Adjust this value based on your needs
for (;;) {
if (__atomic_exchange_n(&lock->locked, 1, __ATOMIC_ACQUIRE) == 0) {
return;
}
while (__atomic_load_n(&lock->locked, __ATOMIC_RELAXED)) {
/**if (--timeout == 0) {
// Force unlock after too many attempts
__atomic_store_n(&lock->locked, 0, __ATOMIC_RELEASE);
continue;
}**/
__asm__ volatile("pause" ::: "memory");
}
// uint64_t timeout = 1000000; // Adjust this value based on your needs
for (;;) {
if (__atomic_exchange_n(&lock->locked, 1, __ATOMIC_ACQUIRE) == 0) {
return;
}
while (__atomic_load_n(&lock->locked, __ATOMIC_RELAXED)) {
/**if (--timeout == 0) {
// Force unlock after too many attempts
__atomic_store_n(&lock->locked, 0, __ATOMIC_RELEASE);
continue;
}**/
__asm__ volatile("pause" ::: "memory");
}
}
}
static inline void spinlock_release(spinlock_t *lock) {
__atomic_store_n(&lock->locked, 0, __ATOMIC_RELEASE);
__atomic_store_n(&lock->locked, 0, __ATOMIC_RELEASE);
}

View file

@ -78,4 +78,3 @@ char *strncpy(char *dest, const char *src, size_t n) {
dest[i] = '\0';
return dest;
}

View file

@ -1,3 +1,6 @@
#include "arch/x86_64/pit.h"
#include "arch/x86_64/smp.h"
#include "arch/x86_64/sse.h"
#include "dev/ioapic.h"
#include "dev/lapic.h"
#include "exec/elf.h"
@ -9,25 +12,22 @@
#include "sched/sched.h"
#include "sys/acpi.h"
#include "sys/acpi/madt.h"
#include "arch//x86_64/pit.h"
#include "arch//x86_64/smp.h"
#include "arch//x86_64/sse.h"
#include "sys/syscall.h"
#include <arch/x86_64/fpu.h>
#include <arch/x86_64/gdt.h>
#include <arch/x86_64/idt.h>
#include <font.h>
#include <fs/vfs.h>
#include <limine.h>
#include <mm/memop.h>
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <arch//x86_64/fpu.h>
#include <arch//x86_64/gdt.h>
#include <arch//x86_64/idt.h>
#include <sys/errhnd/panic.h>
#include <sys/gfx/flanterm/backends/fb.h>
#include <sys/gfx/flanterm/flanterm.h>
#include <sys/log.h>
#include <sys/printf.h>
#include <fs/vfs.h>
__attribute__((
used, section(".limine_requests"))) static volatile LIMINE_BASE_REVISION(3);
@ -79,7 +79,7 @@ void kmain(void) {
idt_init();
pmm_init();
vmm_init();
kernel_vma_context = vma_create_context(vmm_kernel_pm);
if (!kernel_vma_context) {
log("kernel - vma ctx creation failed. halting\n");
@ -87,7 +87,7 @@ void kmain(void) {
while (1)
asm("hlt");
}
acpi_init();
madt_init();
ioapic_init();
@ -97,21 +97,20 @@ void kmain(void) {
syscall_init();
sched_init();
//vfs_init();
// vfs_init();
//panic("No working initialization program found. (This is normal due to "
// "Soaplin's current state, so please do not report this as a bug)");
// panic("No working initialization program found. (This is normal due to "
// "Soaplin's current state, so please do not report this as a bug)");
program_t *p = elf_load(module_request.response->modules[0]->address, 1);
sched_process *proc = sched_create("Test", p->entry, p->pm,
SCHED_USER_PROCESS);
sched_process *proc =
sched_create("Test", p->entry, p->pm, SCHED_USER_PROCESS);
log("kernel - Soaplin initialized sucessfully.\n");
pit_enable();
while (1)
;
;

View file

@ -49,7 +49,7 @@ void vmm_release_pm(pagemap_t *pm) {
}
void vmm_sanity_check() {
uint64_t *my_memory = pmm_request_page();
uint64_t *my_memory = HIGHER_HALF(pmm_request_page());
*my_memory = 0x40;
pagemap_t *pm = vmm_alloc_pm();
@ -113,14 +113,14 @@ void vmm_init() {
log("vmm - mapping address from 0x0 to 0x100000000...\n");
for (uint64_t gb4 = 0; gb4 < 0x100000000; gb4 += PMM_PAGE_SIZE) {
vmm_map(vmm_kernel_pm, gb4, gb4, VMM_PRESENT | VMM_WRITABLE);
//vmm_map(vmm_kernel_pm, gb4, gb4, VMM_PRESENT | VMM_WRITABLE);
vmm_map(vmm_kernel_pm, (uint64_t)HIGHER_HALF(gb4), gb4,
VMM_PRESENT | VMM_WRITABLE);
}
vmm_load_pagemap(vmm_kernel_pm);
vmm_sanity_check();
//vmm_sanity_check();
log("vmm - initialized!\n");
}

View file

@ -1,13 +1,13 @@
#include "sched/sched.h"
#include "arch/x86_64/idt.h"
#include "arch/x86_64/msr.h"
#include "mm/memop.h"
#include "mm/pmm.h"
#include "mm/vmm.h"
#include "arch//x86_64/idt.h"
#include "sys/log.h"
#include <lib/string.h>
#include <stddef.h>
#include <mm/liballoc/liballoc.h>
#include <stddef.h>
sched_process *proc_list;
sched_process *curr_proc;
@ -114,7 +114,6 @@ sched_process *sched_create(char *name, uint64_t entry_point, pagemap_t *pm,
"disabled.\n");
}
log("sched - created process '%s' (pid: %d, rip: %p)\n", proc->name,
proc->pid, proc->regs.rip);
return proc;
@ -158,6 +157,6 @@ void schedule(registers_t *regs) {
memcpy(regs, &curr_proc->regs, sizeof(registers_t));
wrmsr(IA32_GS_KERNEL_MSR, (uint64_t)curr_proc);
//log("sched - proc %d\n", curr_proc->pid);
// log("sched - proc %d\n", curr_proc->pid);
vmm_load_pagemap(curr_proc->pm);
}

View file

@ -1,7 +1,7 @@
#pragma once
#include "mm/vmm.h"
#include "arch/x86_64/idt.h"
#include "mm/vmm.h"
#define SCHED_KERNEL_PROCESS 0 // A process that runs in kernel mode.
#define SCHED_USER_PROCESS \

View file

@ -42,7 +42,7 @@ void *acpi_find_table(const char *name) {
}
void acpi_init() {
acpi_rsdp *rsdp = (acpi_rsdp *)rsdp_req.response->address;
acpi_rsdp *rsdp = (acpi_rsdp *)HIGHER_HALF(rsdp_req.response->address);
if (memcmp(rsdp->sign, "RSD PTR", 7))
panic("acpi: Invalid RSDP signature!");
@ -50,9 +50,9 @@ void acpi_init() {
if (rsdp->revision != 0) {
__acpi_uses_xsdt = 1;
acpi_xsdp *xsdp = (acpi_xsdp *)rsdp;
__acpi_rsdt_ptr = (acpi_xsdt *)HIGHER_HALF((uint64_t)xsdp->xsdt_addr);
__acpi_rsdt_ptr = (void *)HIGHER_HALF(xsdp->xsdt_addr);
return;
}
__acpi_rsdt_ptr = (acpi_rsdt *)HIGHER_HALF((uint64_t)rsdp->rsdt_addr);
__acpi_rsdt_ptr = (void *)HIGHER_HALF(rsdp->rsdt_addr);
}

View file

@ -4,39 +4,39 @@
#include <sys/errhnd/panic.h>
#include <sys/log.h>
madt_ioapic* acpi_madt_ioapic_list[256] = {0};
madt_iso* acpi_madt_iso_list[256] = {0};
madt_ioapic *acpi_madt_ioapic_list[256] = {0};
madt_iso *acpi_madt_iso_list[256] = {0};
uint32_t acpi_madt_ioapic_length = 0;
uint32_t acpi_madt_iso_length = 0;
uint64_t* acpi_lapic_addr = 0;
uint64_t *acpi_lapic_addr = 0;
void madt_init() {
void *addr = acpi_find_table("APIC");
if (!addr)
panic("madt: Failed to find MADT table!");
void *addr = acpi_find_table("APIC");
if (!addr)
panic("madt: Failed to find MADT table!");
acpi_madt *madt = (acpi_madt *)addr;
acpi_madt *madt = (acpi_madt *)addr;
uint64_t offset = 0;
int i = 0;
uint64_t offset = 0;
int i = 0;
while (1) {
if (offset > madt->sdt.len - sizeof(acpi_madt))
break;
while (1) {
if (offset > madt->sdt.len - sizeof(acpi_madt))
break;
madt_entry* entry = (madt_entry*)(madt->table + offset);
madt_entry *entry = (madt_entry *)(madt->table + offset);
if (entry->type == 0)
i++;
else if (entry->type == 1)
acpi_madt_ioapic_list[acpi_madt_ioapic_length++] = (madt_ioapic*)entry;
else if (entry->type == 2)
acpi_madt_iso_list[acpi_madt_iso_length++] = (madt_iso*)entry;
else if (entry->type == 5)
acpi_lapic_addr = (uint64_t*)((madt_lapic_addr*)entry)->phys_lapic;
if (entry->type == 0)
i++;
else if (entry->type == 1)
acpi_madt_ioapic_list[acpi_madt_ioapic_length++] = (madt_ioapic *)entry;
else if (entry->type == 2)
acpi_madt_iso_list[acpi_madt_iso_length++] = (madt_iso *)entry;
else if (entry->type == 5)
acpi_lapic_addr = (uint64_t *)((madt_lapic_addr *)entry)->phys_lapic;
offset += entry->length;
}
offset += entry->length;
}
}

View file

@ -45,12 +45,12 @@ typedef struct {
uint64_t phys_lapic;
} madt_lapic_addr;
extern madt_ioapic* acpi_madt_ioapic_list[256];
extern madt_iso* acpi_madt_iso_list[256];
extern madt_ioapic *acpi_madt_ioapic_list[256];
extern madt_iso *acpi_madt_iso_list[256];
extern uint32_t acpi_madt_ioapic_length;
extern uint32_t acpi_madt_iso_length;
extern uint64_t* acpi_lapic_addr;
extern uint64_t *acpi_lapic_addr;
void madt_init();

View file

@ -1,8 +1,10 @@
#include "arch//x86_64/idt.h"
#include "arch/x86_64/idt.h"
#include "lib/spinlock.h"
#include <mm/memop.h>
#include <sys/log.h>
#include "sched/sched.h"
static registers_t __panic_regdump;
static void __panic_dump_regs() {
@ -51,53 +53,50 @@ static void __panic_dump_regs() {
}
static void __panic_display_page_fault(registers_t *regs) {
if (regs->int_no != 14) // 14 is the page fault interrupt number
return;
if (regs->int_no != 14) // 14 is the page fault interrupt number
return;
uint64_t cr2;
asm volatile("mov %%cr2, %0" : "=r"(cr2));
log("Page Fault Details:\n");
log("Faulting Address (CR2): 0x%lx\n", cr2);
log("Error Code: %d\n", regs->err_code);
log("Flags:\n");
if (!(regs->err_code & (1 << 0)))
log(" - Page Not Present\n");
else
log(" - Protection Violation\n");
if (regs->err_code & (1 << 1))
log(" - Write Access\n");
else
log(" - Read Access\n");
if (regs->err_code & (1 << 2))
log(" - User-Mode Access\n");
else
log(" - Kernel-Mode Access\n");
if (regs->err_code & (1 << 3))
log(" - Reserved Bits Set\n");
if (regs->err_code & (1 << 4))
log(" - Instruction Fetch\n");
uint64_t cr2;
asm volatile("mov %%cr2, %0" : "=r"(cr2));
log("Page Fault Details:\n");
log("Faulting Address (CR2): 0x%lx\n", cr2);
log("Error Code: %d\n", regs->err_code);
log("Flags:\n");
if (!(regs->err_code & (1 << 0)))
log(" - Page Not Present\n");
else
log(" - Protection Violation\n");
if (regs->err_code & (1 << 1))
log(" - Write Access\n");
else
log(" - Read Access\n");
if (regs->err_code & (1 << 2))
log(" - User-Mode Access\n");
else
log(" - Kernel-Mode Access\n");
if (regs->err_code & (1 << 3))
log(" - Reserved Bits Set\n");
if (regs->err_code & (1 << 4))
log(" - Instruction Fetch\n");
}
static void __panic_display_regs(registers_t *regs) {
log("-- REGISTER DUMP --\n");
log("RDI: %p, RSI: %p, RDX: %p, RCX: %p, R8: %p, R9: %p\n",
regs->rdi, regs->rsi, regs->rdx,
regs->rcx, regs->r8, regs->r9);
log("RAX: %p, RBP: %p, RBX: %p, R10: %p, R11: %p, R12: %p\n",
regs->rax, regs->rbp, regs->rbx,
regs->r10, regs->r11, regs->r12);
log("R13: %p, R14: %p, R15: %p\n", regs->r13, regs->r14,
regs->r15);
log("RDI: %p, RSI: %p, RDX: %p, RCX: %p, R8: %p, R9: %p\n", regs->rdi,
regs->rsi, regs->rdx, regs->rcx, regs->r8, regs->r9);
log("RAX: %p, RBP: %p, RBX: %p, R10: %p, R11: %p, R12: %p\n", regs->rax,
regs->rbp, regs->rbx, regs->r10, regs->r11, regs->r12);
log("R13: %p, R14: %p, R15: %p\n", regs->r13, regs->r14, regs->r15);
log("RIP: %p, CS: %x, SS: %x, RFLAGS: %d, INTERRUPT: %d, ERROR CODE: %d\n",
regs->rip, regs->cs, regs->ss,
regs->rflags, regs->int_no, regs->err_code);
regs->rip, regs->cs, regs->ss, regs->rflags, regs->int_no,
regs->err_code);
log("RSP: %p\n", regs->rsp);
if (regs->int_no == 14) // If it's a page fault
__panic_display_page_fault(regs);
}
@ -135,14 +134,17 @@ void panic_ctx(char *msg, registers_t *regs) {
log("\n");
log("%s\n", msg);
log("\n");
if (curr_proc) {
log("Current process: %s (PID: %d)\n", curr_proc->name, curr_proc->pid);
log("\n");
}
if (regs)
__panic_display_regs(regs);
else
log("No register context provided.\n");
log("System halted: Please restart your computer manually.\n");
asm("cli");

View file

@ -1,4 +1,4 @@
#include "arch//x86_64/io.h"
#include "arch/x86_64/io.h"
#include "sys/gfx/flanterm/flanterm.h"
#include <lib/spinlock.h>
#include <lib/string.h>
@ -12,8 +12,8 @@ static spinlock_t log_lock = {0};
void log(char *format, ...) {
// TODO: replace this call with a call to printf() when the RTC is
// implemented.
//spinlock_acquire(&log_lock);
// spinlock_acquire(&log_lock);
char *date = "1970-01-01 00:00:00 | ";
if (ft_ctx)
@ -41,6 +41,6 @@ void log(char *format, ...) {
outb(0xE9, buf[i]);
}
//spinlock_release(&log_lock);
// spinlock_release(&log_lock);
}

View file

@ -52,7 +52,7 @@ void syscall_register(int id, syscall handler) {
extern void syscall_exit(int exit_code);
void syscall_init() {
void syscall_init() {
for (int i = 0; i < 1024; i++)
syscall_table[i] = (syscall)__syscall_undefined;

View file

@ -1,6 +1,6 @@
#pragma once
#include "arch//x86_64/idt.h"
#include "arch/x86_64/idt.h"
#include <stdint.h>
/// A function that defines a system call.