makefile: introduce a format command to run clang-format all over the kernel source.
This commit is contained in:
RaphProductions
parent
c4e98f5ef2
commit
a379d66784
47 changed files with 5092 additions and 4603 deletions
948
kernel/src/sys/arch/x86_64/cpuid.h
Executable file → Normal file
948
kernel/src/sys/arch/x86_64/cpuid.h
Executable file → Normal file
File diff suppressed because it is too large
Load diff
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@ -1,14 +1,12 @@
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#include <stddef.h>
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#include <stdint.h>
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void fpu_set_cw(const uint16_t cw) {
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asm volatile("fldcw %0" :: "m"(cw));
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}
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void fpu_set_cw(const uint16_t cw) { asm volatile("fldcw %0" ::"m"(cw)); }
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void fpu_activate() {
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size_t cr4;
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asm volatile ("mov %%cr4, %0" : "=r"(cr4));
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cr4 |= 0x200;
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asm volatile ("mov %0, %%cr4" :: "r"(cr4));
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fpu_set_cw(0x37F);
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size_t cr4;
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asm volatile("mov %%cr4, %0" : "=r"(cr4));
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cr4 |= 0x200;
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asm volatile("mov %0, %%cr4" ::"r"(cr4));
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fpu_set_cw(0x37F);
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}
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47
kernel/src/sys/arch/x86_64/gdt.c
Executable file → Normal file
47
kernel/src/sys/arch/x86_64/gdt.c
Executable file → Normal file
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@ -1,32 +1,29 @@
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//#include "sys/log.h"
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// #include "sys/log.h"
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#include <mm/memop.h>
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#include <stdint.h>
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#include <sys/arch/x86_64/gdt.h>
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#include <sys/log.h>
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#include <mm/memop.h>
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gdt_table def_table = {
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{
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0x0000000000000000, // 0x00
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gdt_table def_table = {{
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0x0000000000000000, // 0x00
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0x00009a000000ffff, // 0x08 16 bit code
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0x000093000000ffff, // 0x10 16 bit data
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0x00009a000000ffff, // 0x08 16 bit code
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0x000093000000ffff, // 0x10 16 bit data
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0x00cf9a000000ffff, // 0x18 32 bit code
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0x00cf93000000ffff, // 0x20 32 bit data
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0x00cf9a000000ffff, // 0x18 32 bit code
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0x00cf93000000ffff, // 0x20 32 bit data
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0x00af9b000000ffff, // 0x28 64 bit code cs
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0x00af93000000ffff, // 0x30 64 bit data ss
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0x00af9b000000ffff, // 0x28 64 bit code cs
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0x00af93000000ffff, // 0x30 64 bit data ss
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0x00aff3000000ffff, // 0x38 data ss
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0x00affb000000ffff, // 0x40 user mode code cs
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},
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{
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}
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};
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0x00aff3000000ffff, // 0x38 data ss
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0x00affb000000ffff, // 0x40 user mode code cs
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},
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{}};
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tssr tss_list[256]; // One tssr per CPU
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void gdt_init( char* kstack ) {
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void gdt_init(char *kstack) {
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// TODO: adapt for multiprocessor kernel
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tss_list[0].rsp[0] = (uint64_t)kstack;
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@ -40,15 +37,13 @@ void gdt_init( char* kstack ) {
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def_table.tss_entry.base2 = (uint8_t)((tss >> 24) & 0xff);
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def_table.tss_entry.base3 = (uint32_t)(tss >> 32);
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def_table.tss_entry.resv = 0;
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gdtr gdt = (gdtr){
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.size = (sizeof(gdt_table)) - 1,
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.address = (uint64_t)&def_table
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};
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__asm__ volatile ("lgdt %0\n\t" : : "m"(gdt) : "memory");
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__asm__ volatile ("ltr %0\n\t" : : "r"((uint16_t)0x48));
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gdtr gdt =
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(gdtr){.size = (sizeof(gdt_table)) - 1, .address = (uint64_t)&def_table};
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//logln(progress, "kinit stage 1", "GDT initialized\n");
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__asm__ volatile("lgdt %0\n\t" : : "m"(gdt) : "memory");
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__asm__ volatile("ltr %0\n\t" : : "r"((uint16_t)0x48));
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// logln(progress, "kinit stage 1", "GDT initialized\n");
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log("gdt - initialized.\n");
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}
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11
kernel/src/sys/arch/x86_64/gdt.h
Executable file → Normal file
11
kernel/src/sys/arch/x86_64/gdt.h
Executable file → Normal file
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@ -5,10 +5,10 @@
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typedef struct {
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uint16_t length;
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uint16_t base;
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uint8_t base1;
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uint8_t flags;
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uint8_t flags1;
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uint8_t base2;
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uint8_t base1;
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uint8_t flags;
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uint8_t flags1;
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uint8_t base2;
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uint32_t base3;
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uint32_t resv;
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} __attribute__((packed)) tss_entry;
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@ -23,7 +23,6 @@ typedef struct {
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uint64_t address;
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} __attribute__((packed)) gdtr;
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typedef struct {
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uint32_t resv;
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uint64_t rsp[4];
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@ -34,4 +33,4 @@ typedef struct {
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uint16_t iopb;
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} __attribute__((packed)) tssr; // Per CPU
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void gdt_init(char* kstack);
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void gdt_init(char *kstack);
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63
kernel/src/sys/arch/x86_64/idt.c
Executable file → Normal file
63
kernel/src/sys/arch/x86_64/idt.c
Executable file → Normal file
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@ -1,50 +1,51 @@
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//#include "sys/log.h"
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// #include "sys/log.h"
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#include "sys/arch/x86_64/pic.h"
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#include <sys/arch/x86_64/idt.h>
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#include <sys/log.h>
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__attribute__((aligned(0x10)))
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static idt_entry_t idt[256];
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__attribute__((aligned(0x10))) static idt_entry_t idt[256];
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static idtr_t idtr;
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void idt_set_descriptor(uint8_t vector, void* isr, uint8_t flags) {
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idt_entry_t* descriptor = &idt[vector];
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void idt_set_descriptor(uint8_t vector, void *isr, uint8_t flags) {
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idt_entry_t *descriptor = &idt[vector];
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descriptor->isr_low = (uint64_t)isr & 0xFFFF;
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descriptor->kernel_cs = 0x28;
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descriptor->ist = 0;
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descriptor->attributes = flags;
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descriptor->isr_mid = ((uint64_t)isr >> 16) & 0xFFFF;
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descriptor->isr_high = ((uint64_t)isr >> 32) & 0xFFFFFFFF;
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descriptor->reserved = 0;
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descriptor->isr_low = (uint64_t)isr & 0xFFFF;
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descriptor->kernel_cs = 0x28;
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descriptor->ist = 0;
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descriptor->attributes = flags;
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descriptor->isr_mid = ((uint64_t)isr >> 16) & 0xFFFF;
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descriptor->isr_high = ((uint64_t)isr >> 32) & 0xFFFFFFFF;
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descriptor->reserved = 0;
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}
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static int vectors[256];
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extern void* isr_stub_table[];
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extern void *isr_stub_table[];
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void idt_init() {
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idtr.base = (uintptr_t)&idt[0];
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idtr.limit = (uint16_t)sizeof(idt_entry_t) * 256 - 1;
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idtr.base = (uintptr_t)&idt[0];
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idtr.limit = (uint16_t)sizeof(idt_entry_t) * 256 - 1;
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for (uint16_t vector = 0; vector <= 256; vector++) {
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if (vector == 0x80)
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continue; // We skip the syscall handler, since it should be called from user space.
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idt_set_descriptor(vector, isr_stub_table[vector], 0x8E);
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vectors[vector] = 1;
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}
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uint16_t vector = 0x80;
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idt_set_descriptor(vector, isr_stub_table[vector], 0xEE);
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for (uint16_t vector = 0; vector <= 256; vector++) {
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if (vector == 0x80)
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continue; // We skip the syscall handler, since it should be called from
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// user space.
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idt_set_descriptor(vector, isr_stub_table[vector], 0x8E);
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vectors[vector] = 1;
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}
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pic_init();
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pic_unmask_irq(1);
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__asm__ volatile ("lidt %0" : : "m"(idtr)); // load the new IDT
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__asm__ volatile ("sti"); // set the interrupt flag
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uint16_t vector = 0x80;
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idt_set_descriptor(vector, isr_stub_table[vector], 0xEE);
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vectors[vector] = 1;
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//logln(progress, "kinit stage 1", "IDT initialized! Time to receive interrupts!\n");
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log("idt - initialized\n");
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pic_init();
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pic_unmask_irq(1);
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__asm__ volatile("lidt %0" : : "m"(idtr)); // load the new IDT
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__asm__ volatile("sti"); // set the interrupt flag
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// logln(progress, "kinit stage 1", "IDT initialized! Time to receive
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// interrupts!\n");
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log("idt - initialized\n");
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}
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25
kernel/src/sys/arch/x86_64/idt.h
Executable file → Normal file
25
kernel/src/sys/arch/x86_64/idt.h
Executable file → Normal file
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@ -28,24 +28,27 @@ typedef struct {
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} __attribute__((packed)) registers_t;
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typedef struct stackframe {
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struct stackframe* rbp;
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struct stackframe *rbp;
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uint64_t rip;
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} stackframe_t;
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typedef struct {
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uint16_t isr_low; // The lower 16 bits of the ISR's address
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uint16_t kernel_cs; // The GDT segment selector that the CPU will load into CS before calling the ISR
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uint8_t ist; // The IST in the TSS that the CPU will load into RSP; set to zero for now
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uint8_t attributes; // Type and attributes; see the IDT page
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uint16_t isr_mid; // The higher 16 bits of the lower 32 bits of the ISR's address
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uint32_t isr_high; // The higher 32 bits of the ISR's address
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uint32_t reserved; // Set to zero
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uint16_t isr_low; // The lower 16 bits of the ISR's address
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uint16_t kernel_cs; // The GDT segment selector that the CPU will load into CS
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// before calling the ISR
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uint8_t ist; // The IST in the TSS that the CPU will load into RSP; set to
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// zero for now
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uint8_t attributes; // Type and attributes; see the IDT page
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uint16_t
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isr_mid; // The higher 16 bits of the lower 32 bits of the ISR's address
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uint32_t isr_high; // The higher 32 bits of the ISR's address
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uint32_t reserved; // Set to zero
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} __attribute__((packed)) idt_entry_t;
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typedef struct {
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uint16_t limit;
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uint64_t base;
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uint16_t limit;
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uint64_t base;
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} __attribute__((packed)) idtr_t;
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void idt_set_descriptor(uint8_t vector, void* isr, uint8_t flags);
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void idt_set_descriptor(uint8_t vector, void *isr, uint8_t flags);
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void idt_init(void);
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101
kernel/src/sys/arch/x86_64/interrupts.c
Executable file → Normal file
101
kernel/src/sys/arch/x86_64/interrupts.c
Executable file → Normal file
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@ -1,5 +1,5 @@
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//#include "mm/pmm.h"
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//#include "mm/vmm.h"
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// #include "mm/pmm.h"
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// #include "mm/vmm.h"
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#include "mm/pmm.h"
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#include "mm/vmm.h"
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#include "sched/sched.h"
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@ -7,75 +7,72 @@
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#include "sys/arch/x86_64/rtc.h"
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#include "sys/log.h"
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#include "sys/syscall.h"
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//#include "sys/sched.h"
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// #include "sys/sched.h"
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#include <stdint.h>
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#include <sys/arch/x86_64/idt.h>
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#include <sys/arch/x86_64/io.h>
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//#include <sys/errhand/panic.h>
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// #include <sys/errhand/panic.h>
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int pit_millis = 0;
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int pit_secs = 0;
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extern int vmm_kernel_pm_exists;
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struct Idt_StackFrame {
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struct Idt_StackFrame* rbp;
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uint64_t rip;
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}__attribute__((packed));
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struct Idt_StackFrame *rbp;
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uint64_t rip;
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} __attribute__((packed));
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void dump_backtrace(registers_t *r)
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{
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log("ints - backtrace : \n");
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struct Idt_StackFrame* frame = (struct Idt_StackFrame*)r->rbp;
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void dump_backtrace(registers_t *r) {
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log("ints - backtrace : \n");
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struct Idt_StackFrame *frame = (struct Idt_StackFrame *)r->rbp;
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while (frame) {
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log("ints - %s (ip: %p)\n", frame->rip);
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frame = frame->rbp;
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}
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log("ints - <end of backtrace>\n");
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while (frame) {
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log("ints - %s (ip: %p)\n", frame->rip);
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frame = frame->rbp;
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}
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log("ints - <end of backtrace>\n");
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}
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void pit_handler(registers_t *regs);
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void exception_handler(registers_t *regs) {
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vmm_load_pagemap(vmm_kernel_pm);
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if (regs->int_no < 32) {
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//panic(kmode_cpu_exception, regs);
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log("ints - %d (RIP: %p, ERR: %d)\n", regs->int_no, regs->rip, regs->err_code);
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vmm_load_pagemap(vmm_kernel_pm);
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if(regs->int_no == 0xe) {
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uint64_t cr2;
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asm ("mov %%cr2, %0" : "=r"(cr2));
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log("ints - PF: Faulting location: %p (%p)\n", cr2, virt_to_phys(vmm_current_pm, cr2));
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log("ints - PF: Faulting page flags: %p\n", vmm_get_flags(vmm_current_pm, cr2));
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log("ints - PF: Faulting page map: %p\n", PHYSICAL(vmm_current_pm));
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}
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if (regs->int_no < 32) {
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// panic(kmode_cpu_exception, regs);
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log("ints - %d (RIP: %p, ERR: %d)\n", regs->int_no, regs->rip,
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regs->err_code);
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// dump_backtrace(regs);
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asm ("cli");
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while (1)
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asm ("hlt");
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if (regs->int_no == 0xe && vmm_kernel_pm_exists) {
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uint64_t cr2;
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asm("mov %%cr2, %0" : "=r"(cr2));
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log("ints - PF: Faulting location: %p (%p)\n", cr2,
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virt_to_phys(vmm_current_pm, cr2));
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log("ints - PF: Faulting page flags: %p\n",
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vmm_get_flags(vmm_current_pm, cr2));
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log("ints - PF: Faulting page map: %p\n", PHYSICAL(vmm_current_pm));
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}
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if (regs->int_no == 1 + 32)
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{
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if (inb(0x60) & 0x80)
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{
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pic_ack(regs->int_no - 32);
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return;
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}
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// dump_backtrace(regs);
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asm("cli");
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while (1)
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asm("hlt");
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}
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log("ints - keyboard\n");
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if (regs->int_no == 1 + 32) {
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if (inb(0x60) & 0x80) {
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pic_ack(regs->int_no - 32);
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return;
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}
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else if (regs->int_no == 32 + 8) {
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rtc_handle_interrupt(regs);
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}
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else if (regs->int_no == 0x80 - 32 || regs->int_no == 32) {
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pit_handler(regs);
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}
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else if (regs->int_no == 0x80)
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{
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syscall_handle(regs);
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}
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//logln(info, "arch/ints", "Received interrupt %d\n", regs->int_no);
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pic_ack(regs->int_no - 32);
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log("ints - keyboard\n");
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} else if (regs->int_no == 32 + 8) {
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rtc_handle_interrupt(regs);
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} else if (regs->int_no == 0x80 - 32 || regs->int_no == 32) {
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pit_handler(regs);
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} else if (regs->int_no == 0x80) {
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syscall_handle(regs);
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}
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// logln(info, "arch/ints", "Received interrupt %d\n", regs->int_no);
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pic_ack(regs->int_no - 32);
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}
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8
kernel/src/sys/arch/x86_64/pic.c
Executable file → Normal file
8
kernel/src/sys/arch/x86_64/pic.c
Executable file → Normal file
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@ -1,11 +1,11 @@
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//#include "sys/log.h"
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// #include "sys/log.h"
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#include <sys/arch/x86_64/pic.h>
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//#include <sys/acpi.h>
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// #include <sys/acpi.h>
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#include <sys/arch/x86_64/io.h>
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void pic_init() {
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//if (acpi_available)
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// return;
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// if (acpi_available)
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// return;
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uint8_t a1, a2;
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64
kernel/src/sys/arch/x86_64/pit.c
Executable file → Normal file
64
kernel/src/sys/arch/x86_64/pit.c
Executable file → Normal file
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@ -1,60 +1,52 @@
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#include "sched/sched.h"
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#include "sys/arch/x86_64/idt.h"
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#include "sys/arch/x86_64/pic.h"
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#include <sys/log.h>
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#include <stdint.h>
|
||||
#include <sys/log.h>
|
||||
#ifdef __x86_64__
|
||||
|
||||
#include <sys/arch/x86_64/pit.h>
|
||||
#include <sys/arch/x86_64/idt.h>
|
||||
//#include <sipaa/sched.h>
|
||||
#include <sys/arch/x86_64/pit.h>
|
||||
// #include <sipaa/sched.h>
|
||||
|
||||
uint32_t tick = 0;
|
||||
|
||||
void pit_handler(registers_t *regs)
|
||||
{
|
||||
tick++;
|
||||
void pit_handler(registers_t *regs) {
|
||||
tick++;
|
||||
|
||||
schedule(regs);
|
||||
//Scheduler_Schedule(regs);
|
||||
schedule(regs);
|
||||
// Scheduler_Schedule(regs);
|
||||
}
|
||||
|
||||
void pit_init(uint32_t frequency)
|
||||
{
|
||||
uint32_t divisor = PIT_FREQUENCY / frequency;
|
||||
outb(0x43, 0x34);
|
||||
outb(0x40, (uint8_t)(divisor & 0xFF));
|
||||
outb(0x40, (uint8_t)((divisor >> 8) & 0xFF));
|
||||
void pit_init(uint32_t frequency) {
|
||||
uint32_t divisor = PIT_FREQUENCY / frequency;
|
||||
outb(0x43, 0x34);
|
||||
outb(0x40, (uint8_t)(divisor & 0xFF));
|
||||
outb(0x40, (uint8_t)((divisor >> 8) & 0xFF));
|
||||
|
||||
pic_unmask_irq(0);
|
||||
pic_unmask_irq(0);
|
||||
}
|
||||
|
||||
void sleep(uint32_t seconds)
|
||||
{
|
||||
uint32_t eticks = tick + seconds * HZ;
|
||||
while (tick < eticks)
|
||||
{
|
||||
__asm__ __volatile__("hlt");
|
||||
}
|
||||
void sleep(uint32_t seconds) {
|
||||
uint32_t eticks = tick + seconds * HZ;
|
||||
while (tick < eticks) {
|
||||
__asm__ __volatile__("hlt");
|
||||
}
|
||||
}
|
||||
|
||||
void sleep_ms(uint32_t milliseconds)
|
||||
{
|
||||
uint32_t eticks = tick + (milliseconds * HZ) / 1000;
|
||||
while (tick < eticks)
|
||||
{
|
||||
__asm__ __volatile__("hlt");
|
||||
}
|
||||
void sleep_ms(uint32_t milliseconds) {
|
||||
uint32_t eticks = tick + (milliseconds * HZ) / 1000;
|
||||
while (tick < eticks) {
|
||||
__asm__ __volatile__("hlt");
|
||||
}
|
||||
}
|
||||
|
||||
// todo: unistd: add usleep function
|
||||
void usleep(uint32_t usecs)
|
||||
{
|
||||
uint32_t eticks = tick + (usecs * HZ);
|
||||
while (tick < eticks)
|
||||
{
|
||||
__asm__ __volatile__("hlt");
|
||||
}
|
||||
void usleep(uint32_t usecs) {
|
||||
uint32_t eticks = tick + (usecs * HZ);
|
||||
while (tick < eticks) {
|
||||
__asm__ __volatile__("hlt");
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
30
kernel/src/sys/arch/x86_64/rtc.c
Executable file → Normal file
30
kernel/src/sys/arch/x86_64/rtc.c
Executable file → Normal file
|
|
@ -1,26 +1,28 @@
|
|||
#include "sys/arch/x86_64/idt.h"
|
||||
#include "sys/arch/x86_64/io.h"
|
||||
#include <sys/arch/x86_64/rtc.h>
|
||||
#include <sys/arch/x86_64/pic.h>
|
||||
#include <sys/arch/x86_64/rtc.h>
|
||||
#include <sys/printf.h>
|
||||
|
||||
void rtc_init() {
|
||||
asm("cli");
|
||||
outb(0x70, 0x8A);
|
||||
outb(0x71, 0x20);
|
||||
asm("sti");
|
||||
asm("cli");
|
||||
outb(0x70, 0x8A);
|
||||
outb(0x71, 0x20);
|
||||
asm("sti");
|
||||
|
||||
asm("cli"); // disable interrupts
|
||||
outb(0x70, 0x8B); // select register B, and disable NMI
|
||||
char prev=inb(0x71); // read the current value of register B
|
||||
outb(0x70, 0x8B); // set the index again (a read will reset the index to register D)
|
||||
outb(0x71, prev | 0x40); // write the previous value ORed with 0x40. This turns on bit 6 of register B
|
||||
asm("sti");
|
||||
asm("cli"); // disable interrupts
|
||||
outb(0x70, 0x8B); // select register B, and disable NMI
|
||||
char prev = inb(0x71); // read the current value of register B
|
||||
outb(0x70,
|
||||
0x8B); // set the index again (a read will reset the index to register D)
|
||||
outb(0x71, prev | 0x40); // write the previous value ORed with 0x40. This
|
||||
// turns on bit 6 of register B
|
||||
asm("sti");
|
||||
|
||||
//pic_unmask_irq(8);
|
||||
// pic_unmask_irq(8);
|
||||
}
|
||||
|
||||
void rtc_handle_interrupt(registers_t *regs) {
|
||||
(void)regs;
|
||||
printf("RTC!\n");
|
||||
(void)regs;
|
||||
printf("RTC!\n");
|
||||
}
|
||||
|
|
@ -1,6 +1,4 @@
|
|||
#include "sys/arch/x86_64/smp.h"
|
||||
#include "limine.h"
|
||||
|
||||
void smp_init() {
|
||||
|
||||
}
|
||||
void smp_init() {}
|
||||
86
kernel/src/sys/arch/x86_64/sse.c
Executable file → Normal file
86
kernel/src/sys/arch/x86_64/sse.c
Executable file → Normal file
|
|
@ -1,59 +1,59 @@
|
|||
#include <sys/arch/x86_64/sse.h>
|
||||
#include <sys/printf.h>
|
||||
#include <sys/log.h>
|
||||
#include <sys/printf.h>
|
||||
|
||||
int cpuid_check_bit(int reg, int bit) {
|
||||
int eax, ebx, ecx, edx;
|
||||
int eax, ebx, ecx, edx;
|
||||
|
||||
// Minimal inline assembly to execute CPUID
|
||||
__asm__ volatile (
|
||||
"cpuid" // Execute CPUID instruction
|
||||
: "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) // Output registers
|
||||
: "a"(0x1) // Input: EAX = 0x1 (query feature flags)
|
||||
: // No clobbered registers
|
||||
);
|
||||
// Minimal inline assembly to execute CPUID
|
||||
__asm__ volatile("cpuid" // Execute CPUID instruction
|
||||
: "=a"(eax), "=b"(ebx), "=c"(ecx),
|
||||
"=d"(edx) // Output registers
|
||||
: "a"(0x1) // Input: EAX = 0x1 (query feature flags)
|
||||
: // No clobbered registers
|
||||
);
|
||||
|
||||
// Check bit 25 of EDX (SSE support) in plain C
|
||||
if (reg == 0) {
|
||||
if (edx & (1 << bit)) {
|
||||
return 1; // SSE is supported
|
||||
} else {
|
||||
return 0; // SSE is not supported
|
||||
}
|
||||
}else if (reg == 1) {
|
||||
if (ecx & (1 << bit)) {
|
||||
return 1; // SSE is supported
|
||||
} else {
|
||||
return 0; // SSE is not supported
|
||||
}
|
||||
// Check bit 25 of EDX (SSE support) in plain C
|
||||
if (reg == 0) {
|
||||
if (edx & (1 << bit)) {
|
||||
return 1; // SSE is supported
|
||||
} else {
|
||||
return 0; // SSE is not supported
|
||||
}
|
||||
} else if (reg == 1) {
|
||||
if (ecx & (1 << bit)) {
|
||||
return 1; // SSE is supported
|
||||
} else {
|
||||
return 0; // SSE is not supported
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void sse_init() {
|
||||
int sse = cpuid_check_bit(0, 25);
|
||||
int sse2 = cpuid_check_bit(0, 26);
|
||||
int sse3 = cpuid_check_bit(1, 0);
|
||||
int ssse3 = cpuid_check_bit(1, 9);
|
||||
int sse = cpuid_check_bit(0, 25);
|
||||
int sse2 = cpuid_check_bit(0, 26);
|
||||
int sse3 = cpuid_check_bit(1, 0);
|
||||
int ssse3 = cpuid_check_bit(1, 9);
|
||||
|
||||
if (sse)
|
||||
log("sse - sse is supported!\n");
|
||||
else
|
||||
log("sse - sse isn't supported!\n");
|
||||
if (sse)
|
||||
log("sse - sse is supported!\n");
|
||||
else
|
||||
log("sse - sse isn't supported!\n");
|
||||
|
||||
if (sse2)
|
||||
log("sse - sse2 is supported!\n");
|
||||
else
|
||||
log("sse - sse2 isn't supported!\n");
|
||||
if (sse2)
|
||||
log("sse - sse2 is supported!\n");
|
||||
else
|
||||
log("sse - sse2 isn't supported!\n");
|
||||
|
||||
if (sse3)
|
||||
log("sse - sse3 is supported!\n");
|
||||
else
|
||||
log("sse - sse3 isn't supported!\n");
|
||||
if (sse3)
|
||||
log("sse - sse3 is supported!\n");
|
||||
else
|
||||
log("sse - sse3 isn't supported!\n");
|
||||
|
||||
if (ssse3)
|
||||
log("sse - ssse3 is supported!\n");
|
||||
else
|
||||
log("sse - ssse3 isn't supported!\n");
|
||||
if (ssse3)
|
||||
log("sse - ssse3 is supported!\n");
|
||||
else
|
||||
log("sse - ssse3 isn't supported!\n");
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue