did some stuff, will probably refactor later
This commit is contained in:
Jozef Nagy
parent
10ee4fcbd9
commit
bc4ec556e2
GPG key ID:
459A4811CEAC7068
46 changed files with 1013 additions and 35635 deletions
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@ -25,143 +25,71 @@
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#include <lib/string.h>
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#include <print.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <sounds/chime.h>
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#include <hda.h>
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#include <pciconf.h>
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#define INI_IMPLEMENTATION
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#include <config/ini.h>
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EFI_HANDLE gImageHandle;
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EFI_SYSTEM_TABLE *gSystemTable;
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EFI_BOOT_SERVICES *gBootServices;
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#define INITIAL_VOLUME 12
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uint8_t *AlignedDataBufferBdlEntry = NULL;
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uint8_t *SoundData = NULL;
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uint64_t SoundDataSize = 0;
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EFI_STATUS InitHdaControllerCodecAndBuffers(PCI_HDA_REGION *PcieDeviceConfigSpace, HDA_CONTROLLER_REGISTER_SET *ControllerRegisterSet)
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{
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uint32_t WriteValue = 0;
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uint32_t Response = 0;
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DisablePcieInterrupts(PcieDeviceConfigSpace);
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EnablePcieNoSnoop(PcieDeviceConfigSpace);
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// traffic priority -> TC0
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WriteValue = 0;
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WriteControllerRegister(PcieDeviceConfigSpace, HDA_OFFSET_PCIE_TCSEL, (void *)&WriteValue, 1, 0, EfiPciWidthUint8);
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AllocateRIRBBuffer(PcieDeviceConfigSpace);
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AllocateCORBBuffer(PcieDeviceConfigSpace);
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// Turn all nodes on
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SendCommandToAllWidgets8BitPayload(PcieDeviceConfigSpace, HDA_VRB_SET_POWER_STATE, 0x0);
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// Set initial volume to output widgets
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GetCodecData8BitPayloadCorbRirb(PcieDeviceConfigSpace, 0x0, 0x10, HDA_VRB_SET_AMPLIFIER_GAIN_MUTE, INITIAL_VOLUME, &Response);
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GetCodecData8BitPayloadCorbRirb(PcieDeviceConfigSpace, 0x0, 0x11, HDA_VRB_SET_AMPLIFIER_GAIN_MUTE, INITIAL_VOLUME, &Response);
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return EFI_SUCCESS;
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}
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EFI_STATUS AllocateResourcesBasedOnFile(PCI_HDA_REGION *PcieDeviceConfigSpace, HDA_CONTROLLER_REGISTER_SET *ControllerRegisterSet, EFI_UINTN FileSize, EFI_UINTN DataAddress)
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{
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uint8_t WriteValue8 = 0;
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uint16_t WriteValue16 = 0;
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uint32_t WriteValue = 0;
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uint32_t Response = 0;
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void *AlignedDataMapping = NULL;
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uint64_t BdlEntriesRequired = 0;
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uint64_t BdlEntriesRequiredCurrentEntry = 0;
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AllocateStreamsPages(PcieDeviceConfigSpace, ControllerRegisterSet);
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if (SoundDataSize < 0xFFFFFFFF) {
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BdlEntriesRequired = 1;
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} else {
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BdlEntriesRequired = SoundDataSize / 0xFFFFFFFF;
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if (SoundDataSize % 0xFFFFFFFF > 0) {
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BdlEntriesRequired += 1;
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}
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}
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for (BdlEntriesRequiredCurrentEntry = 0; BdlEntriesRequiredCurrentEntry < 2; BdlEntriesRequiredCurrentEntry++) {
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SetupCommonBuffer(&AlignedDataBufferBdlEntry, SoundDataSize / BdlEntriesRequired, &AlignedDataMapping, 2);
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memcpy(AlignedDataBufferBdlEntry, SoundData, SoundDataSize / BdlEntriesRequired);
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AddDescriptorListEntryOss0(PcieDeviceConfigSpace, ControllerRegisterSet, (uint64_t)AlignedDataBufferBdlEntry, SoundDataSize / BdlEntriesRequired, BdlEntriesRequiredCurrentEntry, BdlEntriesRequiredCurrentEntry + 1);
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}
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// Write cyclic buffer length
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WriteValue = SoundDataSize * 2;
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WriteControllerRegister(PcieDeviceConfigSpace, CALCULATE_OSSN_OFFSET(0, ControllerRegisterSet->GCAP) + HDA_RELATIVE_OFFSET_SDXCBL, (void *)&WriteValue, 1, 0, EfiPciWidthUint32);
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// Setup stream ID on codec nodes
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WriteValue8 = 0x10;
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GetCodecData8BitPayloadCorbRirb(PcieDeviceConfigSpace, 0, 0x10, HDA_VRB_SET_CHANNEL_STREAM_ID, WriteValue8, &Response);
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// Set stream ID
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WriteValue = 0x100000;
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WriteControllerRegister(PcieDeviceConfigSpace, CALCULATE_OSSN_OFFSET(0, ControllerRegisterSet->GCAP) + HDA_RELATIVE_OFFSET_SDXCTL, (void *)&WriteValue, 1, 0, EfiPciWidthUint32);
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// Set FIFO size
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WriteValue = 0x04;
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WriteControllerRegister(PcieDeviceConfigSpace, CALCULATE_OSSN_OFFSET(0, ControllerRegisterSet->GCAP) + HDA_RELATIVE_OFFSET_SDXFIFOS, (void *)&WriteValue, 1, 0, EfiPciWidthUint32);
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// Set stream format (2 channel, 16 bits, 44.1kHz)
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WriteValue16 = 0x4011;
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GetCodecData16BitPayloadCorbRirb(PcieDeviceConfigSpace, 0x0, 0x11, HDA_VRB_SET_STREAM_FORMAT, WriteValue16, &Response);
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WriteControllerRegister(PcieDeviceConfigSpace, CALCULATE_OSSN_OFFSET(0, ControllerRegisterSet->GCAP) + HDA_RELATIVE_OFFSET_SDXFMT, (void *)&WriteValue16, 1, 0, EfiPciWidthUint16);
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return EFI_SUCCESS;
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}
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EFI_SIMPLE_POINTER_PROTOCOL *gPointerProtocol;
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uint16_t mouse_resx;
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uint16_t mouse_resy;
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EFI_STATUS uefi_entry(EFI_HANDLE ImageHandle,
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EFI_SYSTEM_TABLE *SystemTable)
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EFI_SYSTEM_TABLE *SystemTable)
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{
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EFI_STATUS Status;
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EFI_STATUS Status;
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EFI_GUID spp_guid = EFI_SIMPLE_POINTER_PROTOCOL_GUID;
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EFI_SIMPLE_POINTER_PROTOCOL *spp[5];
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gImageHandle = ImageHandle;
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gSystemTable = SystemTable;
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gBootServices = SystemTable->BootServices;
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gImageHandle = ImageHandle;
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gSystemTable = SystemTable;
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gBootServices = SystemTable->BootServices;
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// clear the screen
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gSystemTable->ConOut->ClearScreen(gSystemTable->ConOut);
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// clear the screen
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gSystemTable->ConOut->ClearScreen(gSystemTable->ConOut);
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// disable UEFI watchdog
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Status = gSystemTable->BootServices->SetWatchdogTimer(0, 0, 0, NULL);
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if (EFI_ERROR(Status)) {
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debug("Couldn't disable UEFI watchdog: %s (%x)\n", efi_status_to_str(Status), Status);
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}
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// disable UEFI watchdog
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Status = gSystemTable->BootServices->SetWatchdogTimer(0, 0, 0, NULL);
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if (EFI_ERROR(Status)) {
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debug("Couldn't disable UEFI watchdog: %s (%x)\n", efi_status_to_str(Status), Status);
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}
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// load Intel HDA driver
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HDA_CONTROLLER_REGISTER_SET ControllerRegisterSet;
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PCI_HDA_REGION PcieDeviceConfigSpace;
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uint32_t WriteValue = 0;
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uint16_t CurrentVolume = 12;
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// load that mouse up
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EFI_UINTN spp_handles = 0;
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EFI_HANDLE *spp_handle_buf = NULL;
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Status = gBootServices->LocateHandleBuffer(ByProtocol, &spp_guid, NULL, &spp_handles, &spp_handle_buf);
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if (EFI_ERROR(Status)) {
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debug("uefi_entry(): Failed to locate Simple Pointer Protocol handle buffer: %s (%x).", efi_status_to_str(Status), Status);
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} else {
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debug("uefi_entry(): Found %u handle%s\n", spp_handles, spp_handles == 1 ? "" : "s");
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for (EFI_UINTN i = 0; i < spp_handles; i++) {
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Status = gBootServices->OpenProtocol(spp_handle_buf[i], &spp_guid, (void **)&spp[i], gImageHandle, NULL, EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL);
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if (EFI_ERROR(Status)) {
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debug("uefi_entry(): Failed to open Simple Pointer Protocol on handle: %s (%x)\n", efi_status_to_str(Status), Status);
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continue;
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}
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SoundData = chime_data;
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SoundDataSize = chime_len;
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debug("Found SPP with ResX=%u, ResY=%u\n", spp[i]->Mode->ResolutionX, spp[i]->Mode->ResolutionY);
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if (spp[i]->Reset(spp[i], EFI_TRUE) == EFI_DEVICE_ERROR) {
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debug("uefi_entry(): Failed to reset device\n");
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continue;
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}
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Status = InitHda();
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if (EFI_ERROR(Status)) {
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debug("uefi_entry(): Failed to initialize HDA driver!\n");
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} else {
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Status = GetPcieConfigSpace(HDA_BUS, HDA_DEV, HDA_FUNC, &PcieDeviceConfigSpace);
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if (EFI_ERROR(Status)) {
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debug("uefi_entry(): Failed to initialize HDA driver!\n");
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} else {
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GetControllerRegisterSet(&PcieDeviceConfigSpace, &ControllerRegisterSet);
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InitHdaControllerCodecAndBuffers(&PcieDeviceConfigSpace, &ControllerRegisterSet);
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AllocateResourcesBasedOnFile(&PcieDeviceConfigSpace, &ControllerRegisterSet, 0, 0);
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if (spp[i]->Mode->ResolutionX < 65536) {
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gPointerProtocol = spp[i];
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mouse_resx = spp[i]->Mode->ResolutionX;
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mouse_resy = spp[i]->Mode->ResolutionY;
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break;
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}
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}
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}
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WriteValue = 0x100002;
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WriteControllerRegister(&PcieDeviceConfigSpace, CALCULATE_OSSN_OFFSET(0, ControllerRegisterSet.GCAP) + HDA_RELATIVE_OFFSET_SDXCTL, (void *)&WriteValue, 1, 0, EfiPciWidthUint32);
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}
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}
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axboot_init();
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UNREACHABLE();
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axboot_init();
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UNREACHABLE();
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}
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