154 lines
No EOL
4.7 KiB
C
154 lines
No EOL
4.7 KiB
C
/* EMK 1.0 Copyright (c) 2025 Piraterna */
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#include <sys/apic/ioapic.h>
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#include <sys/acpi/madt.h>
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#include <sys/kpanic.h>
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#include <stdatomic.h>
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#include <util/log.h>
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#include <arch/paging.h>
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#include <arch/idt.h>
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#include <arch/smp.h>
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#include <arch/io.h>
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#include <sys/apic/lapic.h>
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static atomic_uintptr_t ioapic_base = 0;
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// Helper function to translate IRQ to GSI based on MADT ISO entries
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static uint32_t irq_to_gsi(uint32_t irq)
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{
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for (uint32_t i = 0; i < madt_iso_len; i++)
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{
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struct acpi_madt_ioapic_src_ovr *iso = madt_iso_list[i];
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if (iso->irq_source == irq)
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{
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return iso->gsi;
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}
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}
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// No override; assume IRQ == GSI
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return irq;
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}
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void ioapic_write(uint8_t index, uint32_t value)
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{
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volatile uint32_t *ioapic = (volatile uint32_t *)atomic_load(&ioapic_base);
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if (!ioapic)
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{
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log_early("error: IOAPIC not initialized");
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kpanic(NULL, "IOAPIC write before init");
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}
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ioapic[IOAPIC_OFF_IOREGSEL / 4] = index;
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ioapic[IOAPIC_OFF_IOWIN / 4] = value;
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}
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uint32_t ioapic_read(uint8_t index)
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{
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volatile uint32_t *ioapic = (volatile uint32_t *)atomic_load(&ioapic_base);
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if (!ioapic)
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{
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log_early("error: IOAPIC not initialized");
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return 0;
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}
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ioapic[IOAPIC_OFF_IOREGSEL / 4] = index;
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return ioapic[IOAPIC_OFF_IOWIN / 4];
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}
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void ioapic_map(int irq, int vec, uint8_t dest_mode, uint8_t lapic_id)
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{
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uint32_t gsi = irq_to_gsi(irq);
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uint32_t max_irqs = ((ioapic_read(IOAPIC_IDX_IOAPICVER) >> 16) & 0xFF) + 1;
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if (gsi >= max_irqs)
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{
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log_early("error: Invalid GSI %u for IRQ %d (max %u)", gsi, irq, max_irqs);
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kpanic(NULL, "Invalid GSI for IOAPIC");
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}
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if (vec < 32 || vec > 255 || vec == LAPIC_SPURIOUS_VECTOR)
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{
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log_early("error: Invalid vector 0x%x for IRQ %d (GSI %u)", vec, irq, gsi);
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kpanic(NULL, "Invalid vector");
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}
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uint32_t redtble_lo = (1 << 16) | // Masked by default
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(dest_mode << 11) | // 0: Physical, 1: Logical
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(0 << 8) | // Fixed delivery
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vec;
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uint32_t redtble_hi = (lapic_id << 24);
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ioapic_write(0x10 + 2 * gsi, redtble_lo);
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ioapic_write(0x10 + 2 * gsi + 1, redtble_hi);
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}
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void ioapic_unmask(int irq)
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{
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uint32_t gsi = irq_to_gsi(irq);
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uint32_t max_irqs = ((ioapic_read(IOAPIC_IDX_IOAPICVER) >> 16) & 0xFF) + 1;
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if (gsi >= max_irqs)
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{
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log_early("error: Invalid GSI %u for IRQ %d (max %u)", gsi, irq, max_irqs);
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return;
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}
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uint32_t redtble_lo = ioapic_read(0x10 + 2 * gsi);
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redtble_lo &= ~(1 << 16);
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ioapic_write(0x10 + 2 * gsi, redtble_lo);
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}
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void ioapic_init(void)
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{
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if (madt_ioapic_len < 1)
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{
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log_early("error: No IOAPIC entries in MADT");
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kpanic(NULL, "No IOAPIC available");
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}
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uint64_t phys_addr = madt_ioapic_list[0]->ioapic_addr;
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if (phys_addr & 0xFFF)
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{
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log_early("error: IOAPIC base 0x%lx not page-aligned", phys_addr);
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kpanic(NULL, "Invalid IOAPIC alignment");
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}
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uint64_t virt_addr = (uint64_t)HIGHER_HALF(phys_addr);
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int ret = vmap(pmget(), virt_addr, phys_addr, VMM_PRESENT | VMM_WRITE | VMM_NX);
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if (ret != 0)
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{
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log_early("error: Failed to map IOAPIC 0x%lx to 0x%lx (%d)", phys_addr, virt_addr, ret);
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kpanic(NULL, "IOAPIC mapping failed");
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}
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atomic_store(&ioapic_base, virt_addr);
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uint32_t ioapic_ver = ioapic_read(IOAPIC_IDX_IOAPICVER);
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uint32_t max_irqs = ((ioapic_ver >> 16) & 0xFF) + 1;
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// Initialize all GSIs, respecting ISO overrides
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for (uint32_t gsi = 0; gsi < max_irqs; gsi++)
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{
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uint32_t vec = 32 + gsi;
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if (vec == LAPIC_SPURIOUS_VECTOR)
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{
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vec++;
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}
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// Check if this GSI is overridden
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int is_overridden = 0;
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uint32_t irq = gsi; // Default: GSI == IRQ
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for (uint32_t i = 0; i < madt_iso_len; i++)
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{
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if (madt_iso_list[i]->gsi == gsi)
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{
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is_overridden = 1;
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irq = madt_iso_list[i]->irq_source;
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break;
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}
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}
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uint32_t redtble_lo = (1 << 16) | // Masked by default
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(0 << 11) | // Physical mode
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(0 << 8) | // Fixed delivery
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vec;
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uint32_t redtble_hi = (get_cpu_local()->lapic_id << 24);
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ioapic_write(0x10 + 2 * gsi, redtble_lo);
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ioapic_write(0x10 + 2 * gsi + 1, redtble_hi);
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if (is_overridden)
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{
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log_early("Initialized IRQ %u (GSI %u) to vector 0x%x", irq, gsi, vec);
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}
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else
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{
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log_early("Initialized GSI %u to vector 0x%x", gsi, vec);
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}
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}
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} |