fix/kernel: Fixed APIC

GNUmakefile

@@ -15,7 +15,7 @@ all: $(IMAGE_NAME).iso
 .PHONY: run
 run: $(IMAGE_NAME).iso ovmf/ovmf-code-x86_64.fd
 	@qemu-system-x86_64 \
-		-M q35 -monitor stdio -serial file:com1.log \
+		-M q35 -serial stdio \
 		-drive if=pflash,unit=0,format=raw,file=ovmf/ovmf-code-x86_64.fd,readonly=on \
 		-cdrom $(IMAGE_NAME).iso \
 		$(QEMUFLAGS)

kernel/src/dev/pit.c

@@ -27,6 +27,7 @@ void pit_init(idt_intr_handler handler)
     outb(0x40, divisor & 0xFF);
     outb(0x40, (divisor >> 8) & 0xFF);
 
-    ioapic_map(0, PIT_VECTOR, pit_handler, 0);
+    idt_register_handler(PIT_VECTOR, pit_handler);
+    ioapic_map(0, PIT_VECTOR, 0);
     ioapic_unmask(0);
 }

kernel/src/emk.c

@@ -215,5 +215,7 @@ void emk_entry(void)
     /* Finished */
     log_early("%s", LOG_SEPARATOR);
     log_early("Finished initializing EMK v1.0, took ? seconds"); /* Still not usermode, so keep using log_early */
+
+    __asm__ volatile("sti");
     hlt();
 }

kernel/src/sys/apic/ioapic.c

@@ -51,7 +51,7 @@ uint32_t ioapic_read(uint8_t index)
     return ioapic[IOAPIC_OFF_IOWIN / 4];
 }
 
-void ioapic_map(int irq, int vec, idt_intr_handler handler, uint8_t dest_mode)
+void ioapic_map(int irq, int vec, uint8_t dest_mode)
 {
     uint32_t gsi = irq_to_gsi(irq);
     uint32_t max_irqs = ((ioapic_read(IOAPIC_IDX_IOAPICVER) >> 16) & 0xFF) + 1;
@@ -74,10 +74,6 @@ void ioapic_map(int irq, int vec, idt_intr_handler handler, uint8_t dest_mode)
     ioapic_write(0x10 + 2 * gsi, redtble_lo);
     ioapic_write(0x10 + 2 * gsi + 1, redtble_hi);
 
-    if (handler)
-    {
-        idt_register_handler(vec, handler);
-    }
     log_early("Mapped IRQ %d (GSI %u) to vector 0x%x on CPU %u", irq, gsi, vec, get_cpu_local()->lapic_id);
 }
 

kernel/src/sys/apic/ioapic.h

@@ -2,7 +2,7 @@
 #ifndef IOAPIC_H
 #define IOAPIC_H
 
-#include <arch/idt.h>
+#include <stdint.h>
 
 #define IOAPIC_OFF_IOREGSEL 0x0
 #define IOAPIC_OFF_IOWIN 0x10
@@ -12,7 +12,7 @@
 #define IOAPIC_IDX_RED_TBL 0x10
 
 void ioapic_init();
-void ioapic_map(int irq, int vec, idt_intr_handler handler, uint8_t dest_mode);
+void ioapic_map(int irq, int vec, uint8_t dest_mode);
 void ioapic_unmask(int irq);
 
 #endif // IOAPIC_H

kernel/src/sys/apic/lapic.c

@@ -102,7 +102,21 @@ void lapic_enable(void)
     svr = (svr & ~0xFF) | LAPIC_SPURIOUS_VECTOR;
     lapic_write(LAPIC_SVR, svr);
 
-    lapic_write(LAPIC_LVT_TIMER, (1 << 16));
+    /* Mask Timer */
+    uint32_t timer = lapic_read(LAPIC_LVT_TIMER);
+    timer |= (1 << 16);
+    lapic_write(LAPIC_LVT_TIMER, timer);
+
+    /* Mask LVT0 */
+    uint32_t lvt0 = lapic_read(LAPIC_LVT_LINT0);
+    lvt0 |= (1 << 16);
+    lapic_write(LAPIC_LVT_LINT0, lvt0);
+
+    /* Mask LVT1 */
+    uint32_t lvt1 = lapic_read(LAPIC_LVT_LINT1);
+    lvt1 |= (1 << 16);
+    lapic_write(LAPIC_LVT_LINT1, lvt1);
+
     lapic_write(LAPIC_TPR, 0);
 
     uint32_t id = lapic_read(LAPIC_ID) >> 24;

kernel/src/sys/apic/lapic.h

@@ -17,6 +17,7 @@
 #define LAPIC_ICRHI 0x0310     // Interrupt Command (High)
 #define LAPIC_LVT_TIMER 0x0320 // LVT Timer
 #define LAPIC_LVT_LINT0 0x350  // LINT0
+#define LAPIC_LVT_LINT1 0x360  // LINT1
 #define LAPIC_TICR 0x0380      // Timer Initial Count
 #define LAPIC_TDCR 0x03E0      // Timer Divide Configuration