feat/kernel: Did some lapic stuff
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7 changed files with 193 additions and 91 deletions
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@ -1,43 +1,75 @@
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/* EMK 1.0 Copyright (c) 2025 Piraterna */
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#include <sys/apic/lapic.h>
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#include <arch/cpu.h>
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#include <sys/acpi/madt.h>
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#include <arch/paging.h>
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#include <util/log.h>
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#include <mm/vmm.h>
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#include <stdatomic.h>
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#include <sys/kpanic.h>
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atomic_uintptr_t lapic_msr = 0;
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volatile uint64_t *lapic_base = 0;
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atomic_uintptr_t lapic_base_atomic = 0;
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#define LAPIC_BASE ((volatile uint32_t *)atomic_load(&lapic_base_atomic))
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void lapic_write(uint32_t offset, uint32_t value)
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{
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if (!lapic_base)
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volatile uint32_t *base = LAPIC_BASE;
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if (!base)
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{
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log_early("warning: LAPIC not initialized!");
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return;
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log_early("error: LAPIC not initialized!");
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kpanic(NULL, "LAPIC write attempted before initialization");
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}
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volatile uint32_t *reg = (volatile uint32_t *)((uint8_t *)lapic_base + offset);
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atomic_store((_Atomic uint32_t *)reg, value);
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base[offset / 4] = value;
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}
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uint32_t lapic_read(uint32_t offset)
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{
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if (!lapic_base)
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volatile uint32_t *base = LAPIC_BASE;
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if (!base)
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{
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log_early("warning: LAPIC not initialized!");
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log_early("error: LAPIC not initialized!");
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return 0;
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}
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volatile uint32_t *reg = (volatile uint32_t *)((uint8_t *)lapic_base + offset);
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return atomic_load((_Atomic uint32_t *)reg);
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return base[offset / 4];
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}
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void lapic_init()
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void lapic_init(void)
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{
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uint64_t msr = rdmsr(LAPIC_BASE);
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uint64_t msr = rdmsr(LAPIC_BASE_MSR);
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msr |= (1 << 11); // Set global LAPIC enable bit
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wrmsr(LAPIC_BASE_MSR, msr);
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atomic_store(&lapic_msr, msr);
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lapic_base = (volatile uint64_t *)(msr & ~(0xffff));
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atomic_store(&lapic_addr, (uint64_t)lapic_base);
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log_early("New LAPIC base: 0x%lx", lapic_base);
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}
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uint64_t phys_addr = msr & ~0xFFFULL;
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uint64_t virt_addr = (uint64_t)HIGHER_HALF(phys_addr);
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int ret = vmap(pmget(), virt_addr, phys_addr, VMM_PRESENT | VMM_WRITE | VMM_NX);
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if (ret != 0)
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{
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log_early("error: Failed to map LAPIC base 0x%lx to 0x%lx", phys_addr, virt_addr);
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kpanic(NULL, "LAPIC mapping failed");
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}
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atomic_store(&lapic_base_atomic, virt_addr);
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atomic_store(&lapic_addr, virt_addr);
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}
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void lapic_enable(void)
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{
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volatile uint32_t *base = LAPIC_BASE;
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if (!base)
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{
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log_early("warning: lapic_enable called before lapic_init");
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return;
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}
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uint32_t svr = lapic_read(LAPIC_SVR);
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svr |= (1 << 8); // Enable APIC
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svr &= ~(1 << 9); // Disable focus processor checking
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svr = (svr & ~0xFF) | 0xFF; // Set spurious interrupt vector to 0xFF
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lapic_write(LAPIC_SVR, svr);
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lapic_write(LAPIC_TPR, 0);
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uint32_t id = lapic_read(LAPIC_ID) >> 24;
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log_early("LAPIC enabled and initialized for CPU %u", id);
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}
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